ChipWhisperer HuskyPlus

• Sample Rate & ADC: 200 MS/s, 12-bit
• Sample Buffer Size: > 80 KSample
• Streaming Support (limited by computer buffer): >20 MS/s, 8-bit data can stream back for unlimited capture sizes.
• Voltage Glitching: 2-size Crowbar glitch
• Clock Glitching: High resolution glitch generation based on phase-shift architecture (sub nS resolution)
• I/O Pins: ChipWhisperer 20-pin header, additional 8 data + 1 clock line. All I/O pins 3.3 V.
• FPGA: Artix A35

ChipWhisperer-Husky benefits from architecture-level decisions that give you a more stable and reliable experience compared to other off-the-shelf test gear (such as oscilloscopes and function generators). Capabilities include synchronous sampling, generating clock glitches less than a nanosecond wide, and using a built-in logic analyzer to visualize glitches and other digital signals

Designed specifically for power analysis and fault injection, ChipWhisperer-Husky has a huge range of triggering mechanisms. These mechanisms run "on the hardware" in the FPGA and allow you to trigger on things like:

• Level / Edge: Trigger on digital rising or falling edge or when passing a specific analog value. This is the normal triggering mechanism you’ll find in every oscilloscope. To see how it works, have a look at the open-source Verilog core.
• Analog Waveform: Trigger when matching a specific pattern in the waveform, not just when crossing a threshold. This allows you to trigger on specific code that you previously identified, even without any external digital signal. This feature was previously exclusive to ChipWhisperer-Pro and certain application-specific products such as Riscure icWaves. You can see how it works in the open-source Verilog core.
• UART Bytes: Trigger on a specific UART character, which allows you to time things relative to a specific boot message or as part of a protocol. This is part of the core trigger unit linked above.
• Edge Count: Trigger on a number of rising edges, which can be useful to trigger on digital protocols for which no specific decoder yet exists. Learn more in the open-source Verilog core.
• Arm Trace: ChipWhisperer-Husky understands the Arm trace format, with messages coming from both SWO (serial trace) and parallel trace pins. This advanced feature—which was designed specifically for white-box evaluations in which you have full control of the target—makes it trivial to understand new algorithms and libraries. The triggering feature means you can trigger when the code hits specific Program Counter (PC) values. This is part of our open-source TraceWhisperer core.
• FPGA Fun: Not only is the ChipWhisperer-Husky FPGA design fully open, it supports extensive test benches, including Verilator simulation-based test benches, so you can add new modules and features as well.

Read the Documentation

Jupyter Tutorials

ChipWhisperer-Husky capture unit

CW313 baseboard

iCE40 FPGA Target

ATSAM4S2AA Microcontroller Target

Helpful accessories