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Whitepaper: Power Analysis Attacks on FPGA Implementations of AES using the CW305

Writer's picture: NewAE Technology TeamNewAE Technology Team

Side-Channel Power Analysis allows us to recovery secret keys from cryptographic implementations. When developing hardware implementations with an end target for either ASICs or FPGAs, it is important to perform power analysis testing early in the design cycle.


The ChipWhisperer platform provides open-source tools for this work, and this whitepaper specifically shows how the CW305 target can be used to quickly test different AES (and other) implementations which are synthesized onto a FPGA device.


Examples are given for two common variants of the AES implementation, which show leakage at different areas of the algorithm. You can use this to learn about power analysis in general, and then apply the techniques to your own implementation of a cryptography algorithm you program into the FPGA on the CW305 board.

NAEAN0010: Power Analysis on FPGA Implementation of AES Using CW305 & ChipWhisperer - Colin O'Flynn, October 29, 2020


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